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Jun Tatt Boon's contacts

Position:Design Verification Engineer at Lattice Semiconductor
Experience:16 years
Location:Penang, Malaysia

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Work Experience

Design Verification Engineer at Lattice Semiconductor

Nov 2023 - Current

SoC DFx Verification Lead at Intel Corporation

Aug 2017 - Oct 2023

SoC DFx Verification Domain Lead at Intel Corporation

Mar 2018 - Jun 2021

SoC DFx Lead (Chipset) at Intel Corporation

Jun 2018 - Nov 2020

SoC Pre-silicon Validation Engineer at Intel Corporation

Jul 2016 - Aug 2017

IP Pre-silicon Validation Engineer at Intel Corporation

Jul 2011 - Jul 2016

Intern Trainee at Microchip

May 2010 - Jul 2010

Jun Tatt Boon started working in 2010, then the employee has changed 2 companies and 6 jobs. On average, Jun Tatt Boon works for one company for 2 years 11 months.

Education

Bachelor of Engineering (Hons.) at Universiti Malaysia Sarawak

St. George's Institution (SGI)

Frequently Asked Questions

What is Jun Tatt Boon's minimum period of employment in the companies?

Jun Tatt Boon's minimum period of employment in various companies is 2 months.

What is Jun Tatt Boon's average duration of employment for different companies?

On average, Jun Tatt Boon works for one company for 3 years

What industries has Jun Tatt Boon worked in?

Jun Tatt Boon works in the Semiconductors.

What positions has Jun Tatt Boon held before?

Previously, Jun Tatt Boon worked as a SoC DFx Verification Lead, and SoC DFx Verification Domain Lead, and SoC DFx Lead (Chipset), and SoC Pre-silicon Validation Engineer, and IP Pre-silicon Validation Engineer.

How do I contact Jun Tatt Boon?

Jun Tatt Boon's email address is j****t@latticesemi.com, phone number is +60-***-***-5102. Sign up to get contact details.

Who is the President & CEO of the Lattice Semiconductor?

The President & CEO of the Lattice Semiconductor is Jim Anderson

Who are Jun Tatt Boon's peers at other companies?

Jun Tatt Boon's peers at other companies are Prasanna Kumari Jupudi and Akhil and Tejashree Neelam

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